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Complementary courses

FPGA101: FROM RECONFIGURABLE TO DOMAIN-SPECIFIC SYSTEMS

Enrollment: from 05-03-2026 to hour 12:00 on 16-03-2026
Enrollment open
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Language: ENGLISH, ITALIAN
Campus: MILANO CITTÀ STUDI
Subject area: Soft skill, personal and career development|Tech and society
Informatic laboratory Frontal teaching
Docente responsabile
DAVIDE CONFICCONI
CCS proponenti
Ingegneria Informatica
CFU
2
Ore in presenza
20
N° max studenti
50
Parole chiave:
Accelerator Cards, Domain Specific Systems, Embedded SoCs, FPGAS
Tag
Aerospace, Computer science, Engineering, Software

Descrizione dell'iniziativa

Overview The course aims to introduce students to the field of adaptable, reconfigurable, and domain-specific systems based mainly on FPGAs, discussing the system architecture, the different design flows, and how to interact with them.   To cope with the ever-growing innovation pace and performance demand, novel systems must adapt and specialize to a particular class of computations in a flexible and adaptable manner, even at the hardware level after manufacturing. Therefore, adaptive domain-specific computing systems are a unique opportunity to deliver energy-efficient computations that guarantee flexibility and performance as their ubiquity grows in many fields.The course encompasses a methodological approach to the three most important system-level topics: understanding the system design, the hardware/software co-design flow, and the hardware/software interaction. Based on that, the course aims to let students understand how to solve different HW/SW co-design trade-offs at a different level: low-level EDA with Vivado and RTL, IP/component design with Vitis HLS, System on Chip (SoC) and PYNQ-based interaction, Accelerator Cards for Datacenter, and the novel AI Engine technology in the context of Versal and Ryzen AI heterogeneous systems with Riallto.  At the end of the course, students must carry on a teaching-like project to complete their course, agreed with the teacher.

Periodo di svolgimento

dal March 2026 a May 2026

Calendario

The activities are alle 18-20. 

Intro, FPGA tech, design flows, 17 March, PT2, Ed. 20, ground floorVivado and the Led Example, 18 March, PT2, Ed. 20, ground floorHLS: Datapath and control, 19 March, PT2, Ed. 20, ground floorHLS: hands on class, 23 March, PT2, Ed. 20, ground floorPYNQ and interfaces 25 March, PT2, Ed. 20, ground floorFull system example on SoCs, 27 March, PT2, Ed. 20, ground floorDatacenter cards and Vitis 31 March, PT2, Ed. 20, ground floorVersal Systems theory and practice 9 April, PT2, Ed. 20, ground floorRyzen AI and specialized NPUs 14 April, PT2, Ed. 20, ground floorOpen Discussion 16 April, PT2, Ed. 20, ground floorQ&A [ON DEMAND]